Entry | SW_score | bits | identity | overlap |
stir:DDW44_14555 | 161 | 42.5 | 0.292 | 185 |
stir:DDW44_22770 | 144 | 38.6 | 0.337 | 101 |
stir:DDW44_24485 | 133 | 36.1 | 0.306 | 111 |
stir:DDW44_14370 | 130 | 35.4 | 0.388 | 67 |
stir:DDW44_00385 | 126 | 34.5 | 0.301 | 133 |
stir:DDW44_27530 | 124 | 34.1 | 0.391 | 46 |
stir:DDW44_25115 | 124 | 34.1 | 0.360 | 89 |
stir:DDW44_18520 | 119 | 32.9 | 0.302 | 106 |
stir:DDW44_14060 | 117 | 32.5 | 0.320 | 100 |
stir:DDW44_14265 | 115 | 32.0 | 0.355 | 62 |
stir:DDW44_22375 | 112 | 31.3 | 0.301 | 83 |
stir:DDW44_27350 | 110 | 30.9 | 0.307 | 101 |
stir:DDW44_07065 | 109 | 30.6 | 0.365 | 63 |
stir:DDW44_25165 | 108 | 30.4 | 0.317 | 104 |
stir:DDW44_09470 | 108 | 30.4 | 0.315 | 92 |
stir:DDW44_00125 | 107 | 30.2 | 0.337 | 83 |
stir:DDW44_16990 | 107 | 30.2 | 0.316 | 98 |
stir:DDW44_02290 | 106 | 30.0 | 0.303 | 119 |
stir:DDW44_20760 | 106 | 30.0 | 0.300 | 100 |
stir:DDW44_17245 | 105 | 29.7 | 0.452 | 42 |
stir:DDW44_04050 | 105 | 29.7 | 0.312 | 109 |
stir:DDW44_30150 | 105 | 29.7 | 0.310 | 116 |
stir:DDW44_05595 | 104 | 29.5 | 0.308 | 117 |
stir:DDW44_02665 | 103 | 29.3 | 0.388 | 67 |
stir:DDW44_27710 | 103 | 29.3 | 0.314 | 102 |
stir:DDW44_07405 | 102 | 29.0 | 0.395 | 43 |
stir:DDW44_05675 | 102 | 29.0 | 0.309 | 94 |
stir:DDW44_30380 | 102 | 29.0 | 0.303 | 89 |
stir:DDW44_08830 | 101 | 28.8 | 0.307 | 75 |
stir:DDW44_26780 | 100 | 28.6 | 0.350 | 60 |